This application incorporates by reference Taiwanese application Ser. No. 89125656, Filed Jan. 11, 2001.
1. Field of the Invention
The invention relates in general to a socket structure, and more particularly to a socket structure for Grid Array (GA) packages.
2. Description of the Related Art
In the development of IC packaging technology, the integrated circuit (IC) packages in Grid Array (GA) forms, such as Ball Grid Array (BGA), Flip Chip BGA and Land Grid Array (LGA) packages, have been evaluated as an important packaging type due to its great developing potential. The IC devices can be packaged by a variety of the exterior packaging materials, so that the IC device can be easily mounted on the printed circuit board (PCB) and the functions of IC signal transmission and heat dissipation are also achieved. In assembling the IC and PCB, the conventional method of pin through hole (PTH) is mostly replaced by the surface mount technology (SMT), in order to increase the assembly efficiency and density of the IC package. The PTH method means that the insertion of component leads into via holes for connecting and soldering the IC to the PCB. The SMT style means that the IC is soldered onto the PCB at high temperature without any insertion of component leads.
In order to increase the density of the IC package, the Area Array Package has gradually replaced the Peripheral Lead Package. This change indicates that the main goal is to develop low cost packages and higher package density and larger pin counts, so as to enhance the packaging yield. Accordingly, the Quad Flat Package (QFP) is replaced by the BGA and LGA, and the Tape Carrier Package (TCP) is replaced by the Flip Chip Package.
FIG. 1A depicts the cross-sectional drawing of a conventional two-layer flip-chip LGA. The package 100 includes the IC 102 and the substrate 104. The top surface of the IC 102, which has the IC I/O pads, faces downward for the purpose of electrically connecting the IC I/O pads to the substrate 104 by the solder bump 106. The periphery of the solder bumps 106 is further filled with the gel to form the underfill 107 for the purpose of mechanically protecting electrical connection between the IC I/O pads and the solder bump 106. The substrate 104 further includes the first solder mask 108, the second solder mask 110 and the vias 112. The IC 102 is attached on the first solder mask 108, while the Ni/Au plated contact land pads 114 form an array in the opening portion of the second solder mask 110, as the name LGA (Land Grid Array) implies. A LGA package with (solder) bump pads (not shown) on the substrate 104 for the purpose of flip-chip die attachment is called a flip-chip LGA package. A flip-chip LGA substrate can have a two-layer (2 L) or multi-layer structure depending on the design requirement and available manufacturing capability. If the solder balls (not shown in FIG. 1A) are further attached on the Ni/Au plated contact land pads 114 in FIG. 1, the package 100 becomes BGA (Ball Grid Array) style. Simply stated, a flip-chip LGA package is essentially identical to a commonly seen flip-chip BGA package with the solder balls removed. Additionally, the vias 112 are between the first solder mask 108 and the second solder mask 110 to electrically connect the solder bumps 106 and the Ni/Au plated contact land pads 114.
FIG. 1B depicts the cross-sectional drawing of a conventional two-layer wire-bond LGA. The package 120 comprises the IC 122 and the substrate 124. The bottom surface of the IC 122, without IC I/O pads, adheres to the substrate 124 by the silver epoxy 126. The substrate 124 further includes the first solder mask 128, the second solder mask 130, and the vias 132. The IC 122 is attached on the first solder mask 128, and the IC I/O pad of the IC die 122 is electrically connected to the substrate 124 by a wire bond method. For example, the opening area on the top side of the first solder mask 128, which is electroplated with Ni/Au and called a bonding finger, is connected to the IC I/O pad by the gold wire 133 for transmitting the electrical signal of IC 122 to the substrate 124. As the name wire-bond LGA (Land Grid Array) implies, the Ni/Au plated contact land pads 134 are attached to the opening portion of the bottom side of the second solder mask 130 and orderly form an array. If the solder balls (not shown in FIG. 1B) are further attached on the Ni/Au plated contact land pads 134 of the second solder mask 130, the package 120 becomes wire-bond BGA (Ball Grid Array) package. Therefore, a wire-bond LGA package is essentially identical to a commonly seen wire-bond BGA package with the solder balls removed. Also, the vias 132 between the first solder mask 128 and the second solder mask 130 to connect the gold wire 133 and the Ni/Au plated contact land pads 134, are the bridge of the electrical signal transmission. Additionally, the molding compound 136 is formed above the first solder mask 128 and encapsulates the IC die 122 for the purpose of protecting the wire bonded IC. The molding compound 136 prevents the wire bonded IC from corrosion and reduce the chance of IC destruction.
In order to mounting the package on the PCB, a socket is usually employed as an intermediate. The socket is usually mounted on the PCB by the PTH (pin through holes) method, and then the package is situated inside the socket. The drawback is that the socket rigidly soldered to the PCB by the leads is not easily removed or replaced when the socket is broken.
Some of the sockets are categorized as test sockets. A technique related to the test socket is disclosed in U.S. Pat. No. 5,290,193, xe2x80x9cHigh density grid array test socketxe2x80x9d, Goff, et al. FIG. 2 depicts the cross-sectional drawing of the conventional test socket. The test socket 200 comprises the extension spring with the snap latches 202a and 202b, the pogo pins assemblies 204a and 204b. If the package 206 is pushed downward, the extension spring with the snap latches 202a and 202b are compressed and moved toward the left and the right side, respectively, to facilitate the electrical contact of the package 206 and the test socket 200. After the package 206 is completely pressed down into the test socket 200, the compressed snap latches 202a and 202b return to the original position and hold down the package 206. The force balance of the snap latches 202a, 202b and the pogo pins assemblies 204a, 204b allows the package 206 to rest in the test socket 200. However, the cost of this test socket is considerably high.
FIG. 3A depicts the 3-dimentional drawing of another conventional socket for mounting on the PCB. Also, refer to FIG. 1A. In FIG. 3A, the socket 320 mounted on the PCB 321 comprises the socket base 322 and the socket lid 324. The socket base 322 has an open area 326 for aligning the package 100. The hinge 328, jointing the socket lid 324 and the socket base 322, allows pivoting of the socket lid 324 on the socket base 322. The socket lid 324 also has an open area 329 corresponding to the open area 326 of the socket base 322. After the IC package 100 is seated within the open area 326, the socket base 322 is covered with the socket lid 324 and fixed by the latching mechanism. For example, when the socket base 322 is covered with the socket lid 324, the first fixing piece 330a and the second fixing piece 330b on the edge of the socket lid 324 are engaged with the first fixing clasp 332a and the second fixing clasp 332b. Additionally, the contacts (not shown in FIG. 3A) formed of a conductive material such as gold plated phosphor-bronze are arranged around the open area 326 and extend transversely through the socket base 322. When the socket 320 is mounted on the PCB 321, the contacts operate to electrically couple the socket base 322 and the IC package 100 to the underlying PCB 321.
Generally, the heat sink (not shown in FIG. 3A) is further attached to the package 100 through the open area 329 for providing effective heat dissipation. In some cases, however, the heat sink directly attaches to the package before the package is aligned in the socket 326. FIG. 3B shows the package with the pre-attached heat sink. Usually, the size of the heat sink 342 is beyond the boundary of the open area 329. When the package 340 with the pre-attached heat sink 342, as shown in FIG. 3B, is seated in the open area 329 of the socket 320, it is very difficult or impossible to close the socket lid 324 due to the large heat sink 342.
The aforementioned sockets have the drawbacks including:
(1) Spring contacts or similar device, such as pogo pins are needed, which may incur the higher production cost of the socket.
(2) For most prior arts, the heat slug or heat sink is larger than the opening area of the socket and the socket base can""t be covered by the hinged socket lid. Therefore, it is impossible to mount an IC package with a pre-attached heat slug or heat sink into the socket.
(3) The sockets are usually not easily removed and replaced if the socket is soldered on the PCB by PTH (pin through hole) method.
It is therefore an objective of this invention to provide a socket structure for grid array (GA) packages. The conventional expansive spring contacts such as pogo pins can be replaced by the flexible chassis assembly of the invention, and the primary cost is therefore decreased. Also, the socket of the invention can host the package with pre-attached heat sink. Besides, the socket mounted on the PCB by SMT method is easily removed and replaced if broken.
The invention achieves the above-identified objectives by providing a socket structure for grid array (GA) packages, which is to be mounted on a printed circuit board (PCB) for receiving a package. The socket structure includes the frame and the flexible chassis assembly. The flexible chassis assembly, situated inside the frame for electrically connecting the package and the PCB, comprises the silicone rubber pad, the inner base plate, the flex-board, two solder mask layers, bumps and solder balls. The inner base plate is beneath and supportive for the silicone rubber pad, and the flex-board encompass the silicone rubber pad and the inner base plate. Two solder mask layers are formed on a surface of the flex-board and have a interconnect layer thereunder. Numerous bumps, formed on the topside of the flexible chassis assembly, are electrically connected to the package. Numerous solder balls, formed on the bottom side of the flexible chassis assembly, are electrically connected to the PCB.
Another objectives of the invention are achieved by providing the socket structure for grid array (GA) packages, which is to be mounted on a printed circuit board (PCB) for receiving a package. The socket structure includes the frame, the first hinge cover lid and the second hinge cover lid. The first hinge cover lid is situated and is for pivoting on the frame by the first hinge pin and the second hinge pin. The second hinge cover lid is situated for pivoting on the frame by the third hinge pin and the fourth hinge pin. Through the closing action of the hinge cover lids onto the package, the package can be well fixed in the socket.